|
|
| Begins |
September 14, 2006
|
|
|
|
|
|
|
|
|
| Category |
Science: Nanotechnology
|
|
| Category 2 |
Computers: Networking
|
|
| Category 3 |
Regional: Europe
|
|
|
|
|
| Contact |
PO Box 864135, Plano, Texas 75086-41135
|
|
|
|
|
|
| Description |
SCOPE: The Nano-Net conference positions itself at the intersection of two worlds, namely, emerging nanotechnologies
on one-side, and network/communication theory on the other side. The standing question that this
conference will address is: What are the new communication paradigms that derive from the transition from
micro- to nano-scale devices? The related degrees of freedom and constraints associated with these new
technologies will change our notions about efficient network and system design. Nano-Net provides a multidisciplinary
forum for the discussion of new techniques in modeling, design, simulation, and fabrication of
network and communication systems at the nano-scale.
PAPERS: The conference invites original technical papers that have not been previously published and are not
currently under review for publication elsewhere. Contributions addressing all subjects pertaining to nanotechnology
& networking are solicited. Suggested topics include, but are not limited to, the following:
1. Networks-on-Chip (NoC)
Network architectures and topologies, NoC performance and trade-off analysis, Energy efficiency and
power management, CAD flows for NoCs and MP-SoC platforms, Fault tolerance and reliability issues
2. Innovative System Interconnects
Nano-technologies and devices for on-chip interconnects (CNTs, semic., metallic and DNA-templated
nanowires), Molecular, optical and wireless interconnects, Interconnects for non-charge-based devices
3. Architectures and Systems for Nano-Networks
Implications of nano-networks on processor and memory architectures, New computing paradigms for
nano-networks, Hybrid CMOS-nano network systems, Self-organization in nano-scale systems
4. Novel Information Theory Aspects of Nano-Networks
Re-configurability of nano-networks, Statistical mechanics approach to nano-communications,
Routing/addressing issues in nano-networks, Nano-coding, Applications of complex networks theory
5. Modeling, and Simulation of Nano-Networks
Physical characterization/modeling of nano-scale interconnects and devices, Fault-tolerant aspects of
nano-devices, Self-healing properties of nano-networks, “Nano-CAD”, Bio-inspired aspects
6. Nano-Scale Wireless Communications
Nanoscale Electromagnetics, Propagation models for nanoscale communications, planning and
optimization, nanoscale antennas, nano-arrays, EMI aspects at nanoscale, reconfigurability issues
SUBMISSION INSTRUCTIONS: Prospective authors are encouraged to submit a PDF version of the full
paper in English language. Papers are limited to 5 two-column pages, in a font no smaller than 10-points. Style
guides and further information are available on the conference website: http://www.nanonets.org. Presentation
will be oral or in a poster format, as deemed more appropriate by the Technical Program Committee.
PUBLICATION: All submitted papers will be subject to a rigorous peer-review. Accepted papers will be
published by the IEEE in the Nano-Net Conference Proceedings, and made available online through IEEE
Xplore. A selected number of high-quality papers will be considered for publication in the ACM Journal on
Emerging Technologies in Computing Systems (JETC). Also, selected papers with a strong nanoscale device
component will be reviewed for publication in a Special Section of the IEEE Transactions on Nanotechnology.
SPECIAL SESSIONS: Proposals for Special Sessions, especially focusing on future applications of nanonetworks
are encouraged. Potential Special Session organizers should submit a proposal of at most 5 pages,
including scope/motivation of the session, list of invited papers (still subject to peer-review) and short-bio of the
organizer(s). Proposals should be submitted by e-mail to: special-sessions@nanonets.org (Prof. Mircea Stan).
|
|
| Additional Information |
GENERAL CO-CHAIRS
Gian Mario Maggio
STMicroelectronics, Switzerland
Chris Dwyer
Duke University, USA
GENERAL VICE-CHAIR
Davide Mandato
Create-Net, Italy
TECHNICAL PROGRAM
CO-CHAIRS
Luca Benini,
U. of Bologna, Italy
Adrian Ionescu
EPFL, Switzerland
Alvin Lebeck,
Duke University, USA
Vwani Roychowdhury
UCLA, USA
Vijaykrishnan Narayanan
Penn State University, USA
Andrea Massa,
U. of Trento, Italy
STEERING COMMITTEE
Imrich Chlamtac (Chair)
Create-Net, Italy
Gian Mario Maggio
STMicroelectronics, Switzerland
Davide Mandato
Create-Net, Italy
INDUSTRIAL SPONSORSHIP
CHAIR
Roberto Zafalon
STMicroelectronics, Italy
FINANCE CHAIR
Karen Decker
ICST
PANELS CHAIR
Ali Keshavarzi
Intel, USA
SPECIAL-SESSIONS CHAIR
Mircea Stan
U. of Virginia, USA
PUBLICATIONS CHAIR
Michael Niemier
Georgia Tech, USA
LOCAL ARRANGEMENTS CHAIR
Alexandre Schmid
EPFL, Switzerland
PUBLICITY CO-CHAIRS
Gianluca Tempesti (Europe)
EPFL, Switzerland
Kaustav Banerjee (USA)
UCSB, USA
Ramgopal Rao (India)
IIT Bombay, India
Hoi-Jun Yoo (Asia)
KAIST, Korea
Takayasu Sakurai (Asia)
U. of Tokyo, Japan
|
|
