Workshop on Computer Architecture and Operating System co-design (CAOS)
|Event Date/Time: Jan 23, 2010||End Date/Time: Jan 27, 2010|
|Abstract Submission Date: Oct 23, 2009|
|Paper Submission Date: Oct 30, 2009|
Multi-core and/or multi-threaded architectures are monopolizing the market, from embedded systems to supercomputers. However, achieving high performance with these modern systems has become a complex task: as the number of cores per chip and/or the number of hardware threads per core continue to increase, new challenges arise in terms of scheduling, power, temperature, scalability, design complexity, efficiency, throughput, heterogeneity, etc. Performance is not the only important metric anymore, and new metrics (such as security, power, total throughput, Quality of Service) are becoming more and more important. It seems clear that neither the hardware nor the software alone can achieve the desired performance and, at the same time, be compliant with these constraints. The answer to these new challenges comes from hardware-software co-design. Computer Architectures (CA) and Operating Systems (OS) should interact through a well-defined interface, exchanging run-time information, monitoring application progress and needs, and enforcing resource management.
This workshop aims to bring together researchers and engineers from academia and industry to share ideas and research directions in Computer Architecture and Operating System co-design and interaction. Authors are invited to submit innovative manuscripts in all areas of parallel and distributed processing, real-time systems, HPC systems and commercial/server systems.
Topics of interest
Papers are sought on topics including, but not limited to:
* Architectural and OS support for power and thermal management
* Architectural and OS support for scheduling applications on emerging multi-core systems
* Benchmarking and characterization of OS activity in multi-core architectures
* Architectural and OS support for virtualization
* Architectural and OS support to manage processor resource allocation and heterogeneity for Quality of Service
* Simulation tools for full system simulation
The workshop provides a forum to discuss the latest proposals in computer architecture and OS and to bring ideas and research problems to the attention of the audience.
We will prioritize papers reporting from on-going work that address cross-cutting issues and provide thought-provoking insights into the main themes. Proceedings with accepted papers will be made available at the workshop.
Abstracts submission deadline: October 23, 2009
Papers submission deadline: October 30, 2009
Notification to authors: December 7, 2009
Final version of accepted papers: December 18, 2009
Submitted papers should use the LNCS format and should be 10 pages maximum. Manuscript preparation guidelines can be found at the LNCS web site.
In order to submit your paper go to http://caos.ac.upc.edu/hotcrp-2.34/.
Francisco J. Cazorla, BSC, francisco.cazorla[at]bsc.es
Roberto Gioiosa, IBM Research, rgioios[at]us.ibm.com
David Atienza Ecole Polytechnique Federale de Lausanne
Alper Buyuktosunoglu IBM Research - Watson
Marco Cesati University of Rome "Tor Vergata"
Sandhya Dwarkadas University of Rochester
Ayose Falcon HP Labs
Alexandra Fedorova Simon Fraser University
Isaac Gelado Universitat PolitÃƒÂ¨cnica de Catalunya
Sally McKee Chalmers University of Technology
Ron Minnich Sandia National Lab
Dan Tsafrir Technion - Israel Institute of Technology
Rizos Sakellariou University of Manchester
Oreste Villa Pacific Northwest National Laboratory